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Sipeed Tang Primer 20K Lite FPGA RISC-V Development Board, Gowin GW2A GoAI Minimum System RISCV Single Board Computer, Onboard 128MB bits DDR3 RAM 828K B SRAM Support RGB DVP PMOD DIP
Limited time offer, ends 07/06 By VoltSync
- [High-performance DSP] Sipeed Tang Primer 20K Core Module board is sodimm package,uses GW2A-LV18PG256C8I7 as the main chip, and hasmultiple internal resources, such as high-performance DSP,high-speed LvDs interface and BSRAM resources, on-boardDDR3 and PMIC. Users could use this CM board for rapiddevelopment and verify, and it's suitable for high-speedand low-cost situations.
- [Run RISC-V Code] Users can burn the hardware code bitstream file ofPicoRV/Litex to Gw2A, and then use GW2A as acommon MCU. lt can run RISC-V code, conduct RISC-v soft core experiments
- [Verilog Design] Users use Verilog to design custom hardware func-tions on the basic of PicoRV/Litex lP core, and at thesame time use C language to write code running onPicoRV/Litex core.
- [Rich Peripheral interfaces]Sipeed Tang Primer 20K Dock is equipped with a wealth of pe-ripheral resources, such as onboard USB-JTAG & UARTperipheral , Ethernet PHY and RJ45 connector, USB2.0PHYHDMIl output connector,Audio output circuit and3.5mm connectorRGB screen connector,DVP cameraconnector.
- [PMOD interfaces] Sipeed Tang Primer 20K Lite ext-board routes so many lOs todouble row pin headers and PMOD interfaces, with whichusers could easily connect other peripheral modules or cir-cuits for secondary development.
- [Minimalist IDE] Comapred with other FPGA IDE, the lDE which is used to develop Tang Primer 20K is really small, the hard disk capacity occupied after installation does not exceed 1G.
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[High-performance DSP] Sipeed Tang Primer 20K Core Module board is sodimm package, uses GW2A-LV18PG256C8I7 as the main chip, and hasmultiple internal resources, such as high-performance DSP, high-speed LvDs interface and BSRAM resources, on-boardDDR3 and PMIC. Users could use this CM board for rapiddevelopment and verify, and it's suitable for high-speedand low-cost situations.. [Run RISC-V Code] Users can burn the hardware code bitstream file ofPicoRV/Litex to Gw2A, and then use GW2A as acommon MCU. lt can run RISC-V code, conduct RISC-v soft core experiments. [Verilog Design] Users use Verilog to design custom hardware func-tions on the basic of PicoRV/Litex lP core, and at thesame time use C language to write code running onPicoRV/Litex core.
. [Rich Peripheral interfaces]Sipeed Tang Primer 20K Dock is equipped with a wealth of pe-ripheral resources, such as onboard USB-JTAG & UARTperipheral, Ethernet PHY and RJ45 connector, USB 2.0PHYHDMI l output connector, Audio output circuit and 3.5 mm connectorRGB screen connector, DVP cameraconnector.. [PMOD interfaces] Sipeed Tang Primer 20K Lite ext-board routes so many lOs todouble row pin headers and PMOD interfaces, with whichusers could easily connect other peripheral modules or cir-cuits for secondary development.. [Minimalist IDE] Comapred with other FPGA IDE, the lDE which is used to develop Tang Primer 20K is really small, the hard disk capacity occupied after installation does not exceed 1G.
. [Rich Peripheral interfaces]Sipeed Tang Primer 20K Dock is equipped with a wealth of pe-ripheral resources, such as onboard USB-JTAG & UARTperipheral, Ethernet PHY and RJ45 connector, USB 2.0PHYHDMI l output connector, Audio output circuit and 3.5 mm connectorRGB screen connector, DVP cameraconnector.. [PMOD interfaces] Sipeed Tang Primer 20K Lite ext-board routes so many lOs todouble row pin headers and PMOD interfaces, with whichusers could easily connect other peripheral modules or cir-cuits for secondary development.. [Minimalist IDE] Comapred with other FPGA IDE, the lDE which is used to develop Tang Primer 20K is really small, the hard disk capacity occupied after installation does not exceed 1G.
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