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Features: JEDEC standard 1.35V (1.28V ~ 1.45V) and 1.5V (1.425V ~1.575V) Power Supply
VDDQ = 1.35V (1.28V ~ 1.45V) and 1.5V (1.425V ~ 1.575V)
667MHz fCK for 1333Mb/sec/pin
8 independent internal bank
Programmable CAS Latency: 9, 8, 7, 6
Programmable Additive Latency: 0, CL - 2, or CL - 1 clock
Programmable CAS Write Latency(CWL) = 7 (DDR3-1333)
Burst Length: 8 (Interleave without any limit, sequential with starting address "000" only), 4 with tCCD = 4 which does not allow seamless read or write [either on the fly using A12 or MRS]
Bi-directional Differential Data Strobe
Internal(self) calibration : Internal self calibration through ZQ
pin (RZQ: 240 ohm +/- 1%)
On Die Termination using ODT pin
On-DIMM thermal sensor (Grade B)
Average Refresh Period 7.8us at lower than...