Is a ddr4 memory good enough for a Rtx 5080 without bottle necks? The ddr4 is significantly cheaper than a ddr5
Also what is the best Amd chip set to pair with the 5080 without sacrificing performance but keeping the budget as low as possible
I think what you’re trying to do is near impossible.
Oh, I can finally apply the 4 hours of research I did on memory 
So DDR3 vs DDR4 vs DDR5.
DDR3 was a product of its time when Intel had won the CPU war and was on a path of 4 core CPUs on 14nm.
DDR3 was made for 240 pin at 1.5v and the numbers looked different. DDR3 was common to see CL 7-14 with 800-2400mhz.
The big drawback here is inorder to hit faster higher speeds, it needed more power. more power = more heat, and at 1.5v already it would tear the ddr3 down.
The other drawback was the prefetching. Prefetch is… think of a one way street. theres 1 lane, moving at less than 45mph. The more cars ( data ) being sent through, it will bottle neck at some point.
DDR4 came out with 288 pin at 1.2v with CL 12-20. They improved this design on the boards themselves, since they had more pins to draw. The speeds seem doubled, but in reality, they are theoretically the same. See, CAS latency is determined by a simple algorithm
Latency (ns) = (CL / Frequency) × 2000
So the while frequency went up, your CAS stayed the same and thus, the improvement were marginal. This is why every generation does not try to improve CAS numbers, but rather, the bandwidth they use!
Thus, DDR4 started " parallel " transfers. Think of the single lane, not a 2 lane road, still 45mph. more cars means more data but since theres more frequent cars passing, were still within the same realm of data.
That data cant just be shoved into the CPU though, it needs an effective way to distribute it. Enter… the Bank. think of a bank like a warehouse. all these cars are giving data to the warehouse, multiple lanes and receiving it all. This is then sent out in the order needed to the CPU to process.
Lastly, DDR4 made POD ( Psuedo Open Drain, where it acts as a gate to electrical pulse ( not the electrical term for a gate ( that i know of ) ). Think of this like the brakes on the delivery trucks. data comes in but without brakes, it could miss the loading dock and damage products. At high frequencies the signals on the module boards are like pulses of electrical energy and even with precise PMIC, it can still cause over multiple signals to be sent at once and cause " Cross talk " ( or a car crash ). This was not an issue at lower frequencies/low speeds cause theres times to react and higher room for marginal error. This POD exist directly between the CPU memory controller and the memory module controller. This eliminates most of the crosstalk/noise with data transferring
( If this confuses you, this is how i worked the analogy with ChatGPT )
This is where DDR5 makes improvements.
DDR5 Came out also with 288 at 1.1v pin with CL 26-40 but they were wired differently, this is why DDR4 modules do not fit in DDR5. They also improved tracing on boards to help give better transfer rates because we had way faster processors. we moved passed 4 cores in 2016, and when ddr5 came out in 2021, we were well into 6-8 and effectively, 12 and 16 cores now. ( dont get me started intels 24 E and P Cores! ).
But with the same amount of tracers and faster frequencies, why did it us 1.1v? Because DDR5 moved the PMIC ( Power Management Integrated Circuit ) directly to the RAM. This chip use to live directly on the motherboard during DDR3 and 4 but its on the memory module now, and it gives effective and precise power to the chips on the modules themselves. Due to this effective, they could tune down clocking cycles much faster, allowing for those huge frequency spikes.
DDR5 also split channels. With DDR4, We have 1 single 64bit channel handling all the data. Now we 2x 32bit channels on a single module. Think of 2 forklifts working for a single truck.
The prefetch also went from 8 to 16! Thats more bits per cell. Now we went from 2 lanes one way, to 4 lanes. Think of NY’s Double bridge.
And with more data means more warehouses. Enter not… Bank Groups! This is just a cluster of banks. No we have all these warehouse distributing to an entire city. Food trucks go to the restaurants or grocery stores, materials go to foundries, they products go appliance or clothes store, etc. Now we have a functioning city!
Now what CPU do you have? Normal or X3D Chips? Thats a whole other conversation that involves L1/2/3, victim cache where is ejects data from L1 down the line until the less important information is not needed. Then there is the cache residency where the program is stored inside the L Caches before it gets boots to ram. Ultimately, X3D Chips have bigger caches, so they need less higher frequency memory and can drive the overall cost of a system lower.
Which is best for a 5080? it really does not matter. your real bottle neck will be with the CPU. What is the best CPU? just choose latest generation, 7800x3d was a great chip for Zen 4. If you already have a 7k series chip, id wait and do a full upgrade to Zen 5.
Hope this answers any questions