The JTAG-HS3 is an affordable high-speedXilinx FPGA programming solutions. The HS3 builds on the successfulJTAG-HS1 by adding an open-drain buffer to pin 14 allowing for thedebugging of Xilinx Zynq-SOC processors. It can be attached to targetboards using Xilinx's 2x7 connector*, and is compatible with all Xilinxtools, including iMPACT, ChipScope, and EDK. When connected to a PC via astandard A to micro-USB cable, the JTAG HS3 receives its power from USB andcan be recognized as a Digilent programming cable, even if the HS3 is notattached to the target board. The JTAG bus can be shared with other devicesas the HS3's signals are held in high-impedance, except when activelydriven during programming.
The HS3 is small and light, allowing it to beheld firmly in place by the system board connector. * This is a uniqueprogramming header and is not compatible with the 1x6 MTE Digilent JTAGConnector.