The joint test action group (JTAG) HS2 programming cable is a high-speedprogramming solution for Xilinx field-programmable gate arrays (FPGAs). The cable is fully compatible will all Xilinx tools and can be seamlesslydriven from iMPACT, ChipScope, and EDK. The HS2 attaches to target boardsusing Digilent's 6-pin, 100-mil spaced programming header or Xilinx's 2x7, 2mm connector and the included adaptor. The PC powers the JTAG-HS2 throughthe USB port and will recognize it as a Digilent programming cable whenconnected to a PC, even if the cable is not attached to the target board. The HS2 has a separate Vdd pin to supply the JTAG signal buffers.
Thehigh-speed 24mA three-state buffers allow target boards to drive the HS2with signal voltages from 1.8V to 5V and bus speeds of up to 30MBit/sec. Tofunction correctly, the HS2's Vdd pin must be tied to the same voltagesupply that drives the JTAG port on the FPGA. The JTAG bus can be sharedwith other devices as systems hold JTAG signals at high-impedance exceptwhen actively driven during programming. The HS2 comes included with astandard Type-A to Micro-USB cable that attaches to the end of the moduleopposite the system board connector. The system board connector should holdthe small and light HS2 firmly in place.